Member of Technical Staff, System Software (Runtime & Firmware)

Role overview

Join a small, multi-disciplinary R&D team building the system software stack for an entirely new class of AI compute hardware. The work sits at the intersection of runtime software on Linux hosts and bare-metal firmware on system-on-chips, integrating novel compute fabrics with custom silicon through a philosophy of extreme hardware/software co-design. The role spans bring-up of prototype chips through scaling a working platform to early customers.

Responsibilities

- Build the runtime layer that executes compiled models on the target machine, including dispatch, data movement, and result readback, with one runtime that runs unchanged on both simulation models and real silicon. - Design and implement bare-metal firmware for the on-device embedded processor, covering model scheduling, device sequencing, and calibration routines. - Develop and maintain drivers on both sides of the host/device boundary and define the protocol between them, including the host-side hardware abstraction layer. - Lead post-silicon software bring-up alongside the hardware team, own the software driving test chips, and feed measured hardware behavior back into simulation models. - Collaborate with AI, system modeling, and hardware teams as well as early customers to deliver and support prototype hardware as the platform scales.

Requirements

- B.S. or M.S. in Electrical Engineering, Computer Engineering, Computer Science, or a related field, plus 7+ years of industry experience in embedded firmware, driver development, or hardware-adjacent systems software. - Demonstrated hands-on experience with at least one silicon or hardware bring-up taken from power-on to running real workloads. - Expertise in C/C++ on embedded processors, including interrupts, DMA, memory-mapped registers, and boot and flash paths. - Experience developing Linux drivers in kernel or user space, with depth in at least one of PCIe, USB, UART, or SPI, and comfort designing robust protocols over imperfect physical links. - Strong Python engineering, plus the versioning discipline needed when firmware, drivers, and host software ship independently. - Ability to triage anomalies across silicon, board, firmware, and software, correlate measured behavior against simulation models, and communicate complex technical ideas from algorithms down to circuits.

Nice to have

- Experience building runtime or driver layers for AI accelerators, NPUs, or GPUs, including kernel dispatch, queueing, and memory management. - Background in instruction encoding, microcode, or control-flow sequencing for non-CPU compute engines. - Hands-on FPGA and SOC prototyping, including RTL development, timing closure, and prototype board bring-up. - Familiarity with cloud infrastructure, virtualization, containerization, or hardware-attached services. - Exposure to analog, mixed-signal, or other physics-based computing paradigms.

Benefits and work setup

- Foundational-team impact on a platform aimed at orders-of-magnitude efficiency gains for AI compute. - Comprehensive benefits package including health coverage, 401k matching, truly unlimited PTO, and complimentary meals. - On-site work in a Mountain View office as part of a deeply collaborative R&D environment tackling unsolved, cross-disciplinary problems.