Distributed Systems Engineer, Multi-Chip Simulation (Mid/Senior/Principal)

Role overview Build the simulation infrastructure that lets distributed software run and be evaluated across many AI accelerator chips before the hardware is available. You will shape the multi-chip simulation architecture, balancing model fidelity with speed, and work with chip modeling, SDK, and runtime teams to make realistic system behavior testable throughout development.

Responsibilities - Simulate host-to-chip and chip-to-chip drivers, links, protocols, and data transfers. - Model communication timing, collective operations, ordering, back-pressure, congestion, and partial failures; calibrate results against hardware. - Evolve the simulation architecture for new chips, interconnects, and deployment layouts. - Combine functional, cycle-level, and hardware-emulation models into a coherent workflow. - Keep simulations fast enough for frequent continuous-integration runs and turn investigations into reusable infrastructure.

Requirements - Experience designing and building distributed systems or simulation infrastructure. - Ability to model concurrent communication, timing, ordering, and failure behavior across multiple components. - Strong software architecture skills and experience scaling systems as requirements evolve. - Ability to collaborate across hardware, SDK, and runtime engineering teams.

Benefits and work setup The role is remote-first, with a company-provided computer and home office setup. Benefits include paid medical, dental, and vision coverage for employees and dependents, paid holidays, flexible paid time off, equity, and a retirement plan with company matching.