DFT (Design For Test) Lead (6251)

Role overview Lead design-for-test engineering across the ASIC lifecycle, from test architecture and RTL integration through silicon validation and production release. The work combines hands-on DFT implementation, manufacturing readiness, and technical leadership across engineering teams.

Responsibilities - Implement and debug scan, JTAG, memory BIST, BISR, boundary-scan, and DFT simulation features. - Develop reusable test IP and methods, integrating testability features into full-chip designs, including bare-die and stacked-die products. - Create, validate, and release ATPG patterns; support manufacturing test readiness and production ramp. - Debug silicon after fabrication, investigate root causes, and support qualification to improve yield, reliability, and manufacturability. - Coordinate with physical design, validation, and hardware teams throughout product development. - Resolve complex DFT issues independently and provide technical guidance to other engineers.

Requirements - Bachelor’s degree in electrical engineering, computer engineering, or a related discipline; a master’s degree is preferred. - 8–10 or more years of ASIC DFT engineering experience. - Practical experience with JTAG, scan, MBIST, BISR, boundary scan, third-party IP, and high-speed digital or analog macros. - ATPG experience and familiarity with tools such as Tessent, Xcelium, Genus, and Tempus or PrimeTime. - At least one full project involving post-silicon DFT pattern debugging and production release. - Strong knowledge of ASIC design, silicon validation, and test methods, with the ability to troubleshoot independently.

Nice to have - Experience standardizing DFT methods from design through high-volume manufacturing, and mentoring engineers. - Familiarity with networking or photonics at the system level; strong communication and analytical skills.

Benefits and work setup - 14-month engagement. Hybrid work is available in Carlsbad, California, or Allentown, Pennsylvania, or the role may be remote within the United States. - Must be available during Pacific business hours, 9 a.m.–5 p.m. PST. - Medical benefits, a 401(k) plan, and paid holidays are offered. The source specifies W-2 employment and no visa sponsorship.