Remote job
Lead FPGA Development Engineer Leader (m,f,d)
Job details
About this role
Role overview Develop and maintain FPGA firmware and associated electronic designs for control and protection systems used in high-voltage direct-current applications. The work spans requirements definition, design, testing, documentation, and support for both new commercial projects and legacy products, in collaboration with engineers across locations.
Responsibilities - Analyze system requirements and define functions to be implemented in hardware. - Develop FPGA designs using model-based methods and HDL, and enhance existing product features. - Design and debug analogue and digital hardware, including high-speed circuits and printed circuit boards. - Maintain legacy products through updates and improvements that extend their useful life. - Prepare functional and test specifications, including routine, type, and test-harness plans. - Contribute to design reviews and maintain design documentation and manufacturing data packs to established standards.
Requirements - Degree in electrical or electronic engineering, or equivalent experience. - Demonstrated experience with model-based design. - At least 10 years of FPGA design experience using VHDL or Verilog. - Strong understanding of electronic components and principles, with advanced hardware and FPGA debugging skills. - Experience with FPGA devices and design tools from vendors such as Altera, Microsemi, or Xilinx. - Experience designing hardware for real-time control, plus high-speed digital design and PCB layout skills. - Ability to work independently and with multidisciplinary engineering teams to resolve technical problems.
Nice to have - Familiarity with agile development, scripting in Perl or Python, version control, and issue tracking tools. - Knowledge of power electronics control systems or high-voltage direct-current technology. - Strong written and verbal communication and a collaborative, self-directed approach.
Benefits and work setup - Remote position; relocation assistance is not provided.