SOC/IP Integration Engineer (eInfochips Inc)

Role overview Integrate third-party and internal IP into subsystems or system-on-chip designs, preparing the resulting design for downstream physical-design handoff. The role covers RTL integration, quality checks, and design closure, alongside regular progress reporting to customers and informal support for less experienced colleagues.

Responsibilities - Integrate subsystem and SoC IP, including first-party and third-party components, and generate interconnect fabrics. - Work with Verilog or SystemVerilog and support synthesis, register integration, timing constraints, and floor-planning considerations. - Optimize performance and help close design-quality checks, including clock-domain crossing (CDC), lint, and reset-domain crossing (RDC). - Prepare integrated designs and quality results for physical-design handoff. - Provide clear daily or weekly customer updates and contribute to process improvements. - Resolve complex integration issues independently and offer informal guidance to junior team members.

Requirements - Typically five to seven years of related experience with a four-year degree, or three years with an advanced degree; equivalent experience may also qualify. - In-depth knowledge of RTL design and digital design concepts. - Experience with subsystem or SoC integration and the associated synthesis, timing, and design-quality workflows. - Ability to work with minimal guidance, solve complex problems, and support colleagues with less experience.

Benefits and work setup The position is full-time and remote in the United States, with travel to a client office when requested. Benefits include medical, dental, and vision insurance, a 401(k) with matching contributions, disability coverage, HSA or HRA options, paid time off, tuition reimbursement, and growth opportunities.