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Senior SoC Architect (f/m/d)

Other Full-time Permanent US

Job details

Not specified Salary
US Eligibility
Senior Experience
Full-time Employment

About this role

Role overview A senior architecture role driving the end-to-end technical direction of an Electronics-Photonics SoC that combines electronic compute with photonic communication using graphene-based innovation. The position owns the full-chip architecture from marketing requirements through to production, integrating digital, analog, I/O, memory, packaging, and photonics subsystems into a single coherent product.

Responsibilities - Lead the overall SoC technical direction from concept through production and drive cross-functional alignment across photonics, analog, digital, packaging, and product teams. - Translate the Marketing Requirement Document into a complete, internally consistent Product Requirement Document. - Own the digital subsystem architecture, including core logic, on-chip interconnect fabric, and subsystem partitioning. - Own the high-speed I/O subsystem architecture with deep expertise in high-speed SerDes and protocol digital logic for UCIe, PCIe, and Ethernet. - Drive full-chip performance, power, and area trade-off analysis and partner with third-party IP providers and characterization teams on silicon validation. - Present the integrated architecture to product management and engineering leadership.

Requirements - 7–10 years in SoC or product architecture roles with at least one full product cycle of PRD-level ownership. - Deep hands-on expertise in high-speed SerDes and protocol digital logic for UCIe, PCIe, and Ethernet. - Strong experience defining on-chip interconnect and digital subsystem partitioning for complex SoCs. - Proficiency with system-level and performance modeling tools, including full-chip performance and power modeling. - Strong Python and C++ skills for modeling, scripting, and analysis. - Comfort coordinating input from multiple subsystem architects into a single PRD.

Nice to have - Prior experience serving as SoC Chief Engineer with end-to-end accountability for architecture, schedule, and quality. - Familiarity with silicon photonics, electro-optic I/O, and how they shift I/O subsystem assumptions. - Experience with advanced packaging such as 2.5D, 3D, and chiplet integration. - Familiarity with CXL or other die-to-die and coherent interconnect standards. - Direct experience shaping MRD-level requirements with product management or customers.

Benefits and work setup - Human-centric, flexibility-first culture with autonomy over how work gets done. - Investment in continuous learning and professional development. - Comprehensive benefits including insurance, pension, and virtual stock plan options.

Skills detected in the listing

PythonC++
Detected Oct 6, 2026
Last verified Oct 6, 2026

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